OpenTitan Earl Grey 2 to support CHERI and PQC

The Earl Grey 2 hardware root-of-trust (RoT) is designed to withstand AI-accelerated and quantum computer attacks for a more secure future

CAMBRIDGE, United Kingdom, July 14, 2026 (GLOBE NEWSWIRE) -- OpenTitan®, the world’s leading open-source project for secure hardware, has published its engineering roadmap. Following the success of the discrete RoT Earl Grey (shipping in Chromebooks) and the integrated RoT Darjeeling, OpenTitan is addressing the new security challenges introduced by Artificial Intelligence and future quantum computers.

Earl Grey 2 introduces four key benefits:

• Support for Capability Hardware Enhanced RISC Instructions (CHERI), which provides scalable memory isolation and memory safety embedded in hardware
• Security-hardened and optimized Post-Quantum Cryptography (PQC) compatible with CNSA 2.0, through extensions to its crypto accelerators
• Advanced control plane I/O with the addition of an I3C controller and target to address peripheral bottlenecks
• Greater efficiency, reducing area and power consumption through process node updates, compressed instructions, IP block optimizations and power domain splitting
  
  

Scalable memory isolation and hardware memory safety with CHERI

Recent improvements in AI technology are being leveraged to find and exploit new vulnerabilities in existing and new software stacks, with more than half of such vulnerabilities relating to spatial and temporal memory safety.

CHERI technology brings a revolutionary, preventive approach to silicon security by enabling fine-grained memory protection and highly scalable software compartmentalization. CHERI replaces traditional, easily manipulated pointers with hardware-protected capabilities augmented with bounds and permissions, eliminating entire classes of memory vulnerabilities directly at the hardware layer, and greatly constraining the impact of any successful attacks.

OpenTitan is implementing a CHERIoT configuration in its Ibex® processor, a specific derivative tailored for highly constrained embedded devices. A CHERIoT-Ibex implementation has been available on the Sonata Platform since 2023, which has fostered the maturity of the CHERI software ecosystem.

By implementing optional CHERI support, OpenTitan enables users to adopt CHERI technology at their own pace. Existing users who already have certified software relying on traditional ePMP can take advantage of the other features in Earl Grey 2 without software changes, while new users can benefit from CHERI’s advantages from the start.

Post-quantum cryptography

Because future quantum machines are expected to easily solve the mathematical problems underpinning traditional asymmetric cryptographic algorithms, standards bodies like NIST have approved quantum-resistant alternatives such as ML-DSA and ML-KEM. Legislative organizations are now urging entities to transition to these new algorithms to ensure continued digital security.

Implementing new PQC algorithms presents optimization and hardening challenges. These new methods require larger keys and more computational cycles, making them difficult to fit on resource-constrained devices. Furthermore, protecting these implementations from physical vulnerabilities like side-channel and fault-injection attacks requires additional expertise and effort. To meet CNSA 2.0 compliance, OpenTitan is overhauling its dedicated programmable cryptographic coprocessor and implementing security hardened PQC algorithms.

I3C controller and target

As modern electronic devices pack more sensors, memory chips, and complex peripherals into smaller spaces, traditional interfaces like I2C and SPI can create bottlenecks. I3C was specifically designed to solve these issues by consolidating the benefits from these two standards into a new specification.

The OpenTitan project is implementing a new combined I3C controller and target, which will enable it to connect to a new range of peripherals, particularly in data centers.

Earl Grey 2 discrete hardware root of trust

OpenTitan partners are working on a new top-level, Earl Grey 2, as the first vehicle to bring the benefits of the roadmap to market. This first commercial deployment will be critical to prove the quality and maturity of the IP.

Earl Grey 2 is an evolution of the existing discrete RoT design Earl Grey, which is already in mass production. Thanks to a change in process node, together with code size and IP block area optimizations, OpenTitan will deliver the greatly enhanced Earl Grey 2 in a similar die size.

Earl Grey 2 design is being upstreamed now, and expected to continue in the open throughout H2 2026 and H1 2027.

About OpenTitan and lowRISC
Hosted by lowRISC C.I.C., a not-for-profit company based in Cambridge, UK, OpenTitan provides a transparent and trustworthy secure silicon platform. OpenTitan® is the world's most active and widely adopted open-source silicon project, containing commercial-grade IP blocks and security certified hardware Root of Trust designs.

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